The main objective of my research is to develop low‑power cryogenic ICs for quantum computing applications.
Specifically, my work addresses the challenges of implementing clock‑generation modules that can operate reliably at cryogenic temperatures while meeting stringent requirements on noise performance, power consumption, and system scalability.
From a broader perspective, this research targets key technological and societal challenges related to the scalability and energy efficiency of quantum computing. In the long term, scalable and energy‑efficient quantum computers could have a substantial impact on scientific discovery, secure communication, and materials science, thereby addressing important economic and societal needs.
Methodologically, I use analytical modeling and simulations to study noise, stability, and power trade‑offs at the architectural level, followed by transistor level design and verification using industry-standard EDA tools.
